Data networks are becoming more critical to every aspect of the business world. No longer are all divisions of a company, such as marketing, R&D, production, and sales co-located within the same building or campus. In many cases, the personnel supporting these business units are not even located within the same country or continent. Virtual worldwide corporate networks typically consist of local area networks (LANs), which are often connected to the Internet to reach employees across the globe. As businesses increase their use of networks, the result will be a more heavy reliance on transmitting data across these networks. This need for greater bandwidth and faster processing power will ultimately drive the need for more specialized network components.
At the heart of this technology race is the central processing unit (CPU). The CPU, or the brains of most network devices, has evolved over time to fit a greater number of transistors into ever smaller packages. The basic goal of every new CPU design is to perform more operations in less time. As a result, new CPU architecture designs are needed to support an increasing and massive flow of information across networks at all levels.
The network protocols that are becoming the standard for moving this massive amount of information require specific operations to be performed. The CPUs used in this infrastructure must contain specialized functions to permit the rapid classification, manipulation, routing, and processing of packet-based messages. Performing fast parallel search operations would be useful in performing lookups in routers and networking equipment, in performing network traffic address management, and for performing other functions in which pattern recognition is needed. In addition, on-chip error detection circuitry is needed to determine if data packets reached their destination without error, and to aid in the retransmission of those data packets that did not. Currently, on-chip CPU designs are not specialized to perform the network intensive functions necessary to achieve the next level in network processing.
Accordingly, there is a need for systems and methods that will address CPU architecture designs that embed the important network processing functions into the CPU, and thereby eliminate the need to go off-chip to perform these functions.